Logic triggers: circuits, classification, device, purpose, application

What are logical triggers?
A trigger is the simplest sequential device that can be in one of two possible states and transition from one state to another under the influence of input signals. A trigger is the basic element of sequential logic devices. Trigger inputs are divided into information and control (auxiliary). This division is largely arbitrary. Information inputs are used to control the trigger state. Control inputs are typically used to preset a flip-flop to some state and for synchronization.

Vasiliev Dmitry Petrovich

Professor of Electrical Engineering, St. Petersburg State Polytechnic University

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Triggers can have 2 outputs: direct Q and inverse Q.

Triggers are classified according to various criteria, so there is a fairly large number of classifications. Unfortunately, these classifications do not form a coherent system, but an engineer needs to know them.

Trigger classification

  • by the method of receiving information;
  • according to the principle of construction;
  • by functionality.

Asynchronous trigger

Asynchronous trigger - changes its state immediately at the moment the corresponding information signal appears.

Vasiliev Dmitry Petrovich

Professor of Electrical Engineering, St. Petersburg State Polytechnic University

Synchronous triggers - react to information signals only if there is a corresponding signal at the so-called synchronization input C (from the English clock). This input is also designated by the terms “strobe”, “tact”.

Synchronous triggers

Synchronous flip-flops, in turn, are divided into flip-flops with static (static) and dynamic (dynamic) control via the synchronization input C. Static flip-flops perceive information signals when a logical one (direct input) or a logical zero (inverse input) is applied to input C.

Dynamic triggers perceive information signals when the signal at input C changes (changes) from 0 to 1 (direct dynamic C-input) or from 1 to 0 (inverse dynamic C-input).

Static triggers

Static triggers, in turn, are divided into single-stage (single-cycle) and two-stage (push-pull). A single-stage trigger has one stage of storing information, and a two-stage trigger has two such stages. First, information is recorded in the first stage, and then rewritten into the second and appears at the output. A two-stage trigger is designated by TT.

Symmetric

A symmetrical trigger refers to a special type of element. It is created using transistors and is a two-stage DC amplifier. The device operates by using transistors with completely identical parameters.

The operating principle is as follows:

  1. When voltage is applied to the device, transistor VT1 is considered open. Its collector voltage is 0.
  2. At this moment, transistor VT2 is closed. Its collector has a positive voltage.
  3. To effect a transition from one state to another, a voltage pulse is used. This pulse is created by a capacitor.
  4. When a pulse appears, the transistors change their state.

When changing the position of the transistors, a voltage drop is created and it decreases significantly.

In symmetrical flip-flop circuits, the main element is the triggering system. It may differ in the control method and the place from which the starting impulse came.

  1. Separate control. Involves supplying voltage to a specific trigger input. With this control, the element is considered an RS trigger.
  2. General or accounting management. Voltage is supplied to the common input pin. With this connection, the device is similar in parameters to a T-trigger.

The source of the pulse can be from the collector or base of the transistor. With such connection schemes, there is a possibility of a false or secondary signal. It is cut off by connecting a diode.

The main disadvantage of symmetrical elements is their complete dependence on the time of arrival of the pulse signal and its duration. If the duration is insufficient, the pulse will not have time to open the transistor, which means the second transistor will not close.

Such devices are used in pulse metering devices, frequency generators, and radio-electronic circuit switches.

Designation of trigger inputs

Flip-flop inputs are usually designated as follows:

S —input for setting to state “1”;

R —input for setting to state “0”;

J - input for setting to state “1” in a universal trigger;

K - input for setting to state “0” in a universal trigger;

T — counting (general) input;

D — input for setting to state “1” or state “0”;

V - additional control input to allow receiving information (sometimes the letter E is used instead of V).

Let's look at some types of triggers and their implementation on logical elements.

Practical use

Most often, a trigger is used to generate a signal whose duration corresponds to the duration of the process in the system it controls. It can either directly resolve its beginning and end, or transmit information to other elements that the process has started. In this way, control of the system is achieved; then you only need to take care of resolving the situation of uncertainty.

The second important function of a trigger is process synchronization. This helps eliminate unnecessary and random pulses that occur, for example, when several input signals change within a very short period of time. In addition, with the help of triggers, you can “pass” only pulses of full duration into the system or delay incoming information.

The implementation of triggers and their use in practice occurs in various devices for memorization and memory storage. It is this element that represents a basic RAM cell capable of storing 1 bit of information in a static state. In addition, it is used for the following purposes:

  • as components for creating microcircuits for various purposes;
  • as an organizer of computing systems;
  • in shift and storage registers;
  • for the manufacture of semiconductor systems such as transistors and relays.

A trigger is not only a basic element of electronics, but also the simplest cybernetic device capable of performing its logical function while simultaneously maintaining feedback. Thus, it is used to create many mechanisms whose purpose or operating condition is the ability to remember, store, transmit and transform information. You can find a trigger in any device, from power switching systems to elements of digital microelectronics.

Creating spare parts for computers, mobile phones, robots, control panels, vehicles and many other devices is impossible without the use of triggers. They are also used for the manufacture of simple circuits based on electromagnetic relays - such designs are still used due to their simplicity and high immunity to interference, despite their high energy consumption.

Asynchronous RS flip-flop

Let us turn to an asynchronous RS trigger, which has a conventional graphic symbol shown in Fig. 3.54.

The trigger has two information inputs: S (from the English set) and R (from the English reset).

It is convenient to describe the law of operation of triggers using a transition table, which is sometimes also called a truth table (Fig. 3.55). S', ​​R', Q' denote the corresponding logical signals occurring at some time t, and Qt + 1 the output signal at the next time t+1.

The combination of input signals S' = l, R' =1 is often called forbidden, since after it the trigger finds itself in a state (1 or 0), which is impossible to predict in advance. Such situations should be avoided.

The trigger in question can be implemented on two NOR elements (Fig. 3.56).

It is necessary to ensure that this circuit functions in full accordance with the transition table above.

The K564TP2 microcircuit contains 4 asynchronous RS triggers and one control input (Fig. 3.57).

Abrahamyan Evgeniy Pavlovich

Associate Professor, Department of Electrical Engineering, St. Petersburg State Polytechnic University

When a low level is applied to the input V, the outputs of the triggers are disconnected from the pins of the microcircuits and go into the third so-called high-impedance state. When a logical signal “1” is applied to input V, the flip-flops operate in accordance with the above transition table.

In an asynchronous RS flip-flop using NAND elements, switching is performed by a logical “0” applied to the R or S input, i.e., the inverse of the previously discussed transition table is implemented (Fig. 3.58). A prohibited combination corresponds to logical “0” at both inputs.

Description and principle of operation

In a broad sense, a trigger (from the English trigger - a trigger that starts a mechanism) is any impulse or event that causes something. The term is used in electronics, psychology, medicine, programming and other fields of activity. In the creation of microcircuits and other devices, this is the name given to an element that is capable of taking one of two stable states (0 or 1) and maintaining them for a long time.

The position of the trigger depends on the signals it receives at the direct and inverse outputs. A distinctive feature of the device is that its transition from one position to another is determined not only by receiving external instructions coming from the selected control system, but also through feedback. That is, the current position of an element depends on the history of its operation.

only retain their memory . If you unplug it and then plug it back in, the device will go into a random state. Therefore, when designing a device, it is important to provide for the way in which it will initially be inserted into the correct position.

Any trigger is based on a circuit that consists of two logical elements of the AND-NOT or NOR-NOT type, which have positive feedback with each other. This type of connection allows the system to have only two possible stable states, from which one is selected. An important detail is that after the trigger has moved to a position, it can maintain it for as long as desired, until the next control signal is sent.

Another characteristic feature of the devices is the ability to instantly transition from one state to another after receiving the appropriate command. The delay is so small that it can be ignored when performing calculations.

The number of inputs may vary and depends on the required functions. If you send a signal to two of them simultaneously, it will take an arbitrary position after their arrival stops. According to their functions, inputs are divided into several types, which are included in two large groups: information and control. The first of them receive signals and store them in the form of information, while the second allow or prohibit its recording, and also perform a synchronization function. In the diagrams they have the following designations:

  • S - sets the trigger to state “1” on the direct output;
  • R is the opposite of S, resets the state back to “0”;
  • C - synchronization input;
  • D - receives information for subsequent recording on the trigger;
  • T — counting input.

The combination of different types of inputs and outputs determines how the flip-flop operates. There are many designs of these devices used for different purposes.

Synchronous RS trigger

Consider a synchronous RS flip-flop (Fig. 3.59).

If the input C is logical “0”, then both the output of the upper input element “AND-NOT” and the output of the lower one will be logical “1”. And this, as noted above, ensures the storage of information.

Vasiliev Dmitry Petrovich

Professor of Electrical Engineering, St. Petersburg State Polytechnic University

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Thus, if the input C is logical “0”, then the influence on the inputs R, S does not lead to a change in the state of the trigger.

If a logical unit is applied to the synchronization input C, then the circuit reacts to input signals in exactly the same way as the one discussed earlier (Fig. 3.56).

Brief theoretical information

Triggers are designed to store binary information. The use of triggers makes it possible to implement RAM devices (that is, memory in which information is stored only for the duration of calculations).

However, flip-flops can also be used to build some digital memory devices, such as counters, serial-to-parallel converters, or digital delay lines.

RS trigger

The main trigger on which all other triggers are based is the RS trigger. The RS trigger has two logical inputs:

  • R – setting 0 (from the word reset);
  • S – setting 1 (from the word set).

The RS trigger has two outputs:

  • Q – straight;
  • Q - reverse (inverse).

The state of the trigger is determined by the state of the direct output. The simplest RS flip-flop consists of two logic elements covered by cross positive feedback.

Let's look at how the trigger works:

Let R=0, S=1. The lower logical element performs the logical OR-NOT function, i.e. 1 at any of its inputs leads to the fact that its output will have a logical zero Q=0. The output Q will be 1 (Q=1), because zeros are supplied to both inputs of the upper element (one zero from input R, the other from output). The trigger is in a single state. If we now remove the setting signal (R=0, S=0), the situation at the output will not change, because Although the lower input of the lower logic gate will receive a 0, its upper input will receive a 1 from the output of the upper logic gate.

It will be interesting➡ What is electrolysis and where is it used in practice?

The flip-flop will remain in the single state until a reset signal is received at the R input. Let now R=1, S=0. Then Q=0, a =1. The trigger switched to “0”. If after this you remove the reset signal (R=0, S=0), then the trigger will still not change its state. To describe the operation of a trigger, a table of states (transitions) is used. Let's denote:

  • Q(t) – state of the trigger before the arrival of control signals (changes at inputs R and S);
  • Q(t+1) – trigger state after changes at inputs R and S.

Transition table of RS flip-flop in NOR basis

RSQ(t)Q(t+1)Explanations
Information storage mode R=S=0
11
11Unit setting mode S=1
111
1Zero setting mode R=1
11
11*R=S=1 prohibited combination
111*

An RS trigger can also be built using “AND-NOT” elements (Figure 2.2).

Inputs R and S are inverse (active level “0”). The transition (switching) of this trigger from one state to another occurs when one of the inputs is set to “0”. The combination R=S=0 is prohibited.

Transition table of RS flip-flop in the “2AND-NOT” basis

RSQ(t)Q(t+1)Explanations
*R=S=0 prohibited combination
1*
1Zero setting mode R=0
11
11Unit setting mode S=0
111
11Information storage mode R=S=1
1111

Synchronous RS trigger

The RS flip-flop circuit allows you to remember the state of the logic circuit, but since a transient process may occur when the input signals change (in digital circuits this process is called “dangerous races”), you need to remember the states of the logic circuit only at certain moments in time, when all transient processes are completed, and the signal at the output of the combinational circuit corresponds to the function it performs. This means that most digital circuits require a synchronization signal (clock signal).

All transient processes in a combinational logic circuit must end during the period of the clock signal supplied to the inputs of the flip-flops. Flip-flops that remember input signals only at the time specified by the synchronization signal are called synchronous. A schematic diagram of a synchronous RS flip-flop is shown.

Transition table of synchronous RS flip-flop

RSCQ(t)Q(t+1)Explanations
1Information storage mode R = S = 0
111
111Unit setting mode S =1
1111
11Zero setting mode R=1
111
111*R = S = 1 prohibited combination
1111*

In table 2.3. By signal C we mean a sync pulse. Without a clock pulse, a synchronous RS flip-flop retains its state.

MS type trigger

Let's consider the principle of constructing a two-stage trigger, which is also called an MS type trigger (from the English master, slave, which is usually translated as “master” and “slave”). Its simplified block diagram is shown in Fig. 3.60. The circuit has two single-stage triggers (master M and slave S) and two electronic keys (Cl1 and Cl2).

The timing diagram of the synchronization signal, explaining the operation of the trigger, is shown in Fig. 3.61.


Let's consider a number of time intervals of the indicated diagram:

t < ta — the leading trigger is disconnected from the information inputs, the slave trigger is connected to the master;

ta < t < tb — the leading trigger is disconnected from the information inputs, the slave trigger is disconnected from the master;

tb < t < tc — the master trigger is connected to the information inputs, the slave trigger is disconnected from the master. The master flip-flop records the information supplied to the inputs;

tc < t < td — the leading trigger is disconnected from the information inputs, the slave trigger is disconnected from the master;

td < t - the master trigger is disconnected from the information inputs, the slave trigger is connected to the master, information from the master trigger is rewritten to the slave. This occurs immediately after time td and means that, in fact, a two-stage flip-flop is triggered when the clock signal changes from 1 to 0. In this case, the output signals are determined by those input information signals that occurred immediately before the negative edge of the clock signal.

JK trigger

Let's consider a JK flip-flop (from the English jump and keep), which differs from the considered RS flip-flop in that the appearance of logical units at both information inputs (J and K) (for direct inputs) leads to a change in the state of the trigger. This combination of signals for a JK flip-flop is not prohibited.

Otherwise, the JK flip-flop is similar to the RS flip-flop, with the role of the S input being played by the J input, and the role of the R input being played by the K input.

JK flip-flops are implemented as MS flip-flops or as dynamic flip-flops (i.e., JK flip-flops are synchronous).

In Fig. Figure 3.62 shows a conventional graphic designation of a two-stage JK trigger.

Let's turn to dynamic triggers. They are characterized by blocking information inputs at the moment when the received information is transmitted to the output. It should be noted that in terms of response to input signals, a dynamic trigger, triggered when the signal at input C changes from 1 to 0, is similar to the considered two-stage trigger, although they differ in internal structure.

For direct dynamic C-input, use the designations shown in Fig. 3.63, a, and for the inverse dynamic C-input, use the notation shown in Fig. 3.63, b.

CPU Automated control systems and industrial safety

A trigger is the simplest sequential device that can remain in one of several possible stable states for a long time and transition from one to another under the influence of input signals. According to the method of working with signals, synchronous, asynchronous and mixed trigger circuits are distinguished. An asynchronous trigger changes its state immediately at the moment the corresponding information signal appears. Synchronous triggers respond to information signals only if there is a corresponding signal at the so-called synchronization input C (from the English clock). This input is also designated by the terms “strobe”, “tact”. Synchronous flip-flops, in turn, are divided into flip-flops with static (static) and dynamic (dynamic) control at the synchronization input C. RS-trigger or SR-trigger - a flip-flop that retains its previous state when inputs are zero, and changes its output state when applied one of its inputs is one. When a unit is applied to the input S (from English Set - set), the output state becomes equal to a logical one. And when one is applied to the input R (from the English English Reset - reset), the output state becomes equal to logical zero. If the RS trigger is synchronous, then the state of its inputs is taken into account only at the moment of clocking, for example, at the leading edge of a pulse. The state in which logical ones are simultaneously applied to both inputs R and S is prohibited. So, for example, the RS trigger circuit shown in the figure, when a logical zero is applied to both inverse inputs, will go into a state where both outputs will be ones, which does not correspond to the logic of the trigger output, since the inverse output will be equal to the non-inverse Q, i.e. .

SRQ(t) Q(t+1) 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 0 1 0 0 1 1 0 1 1 1 1 0 * 1 1 1 * RS flip-flop is used to create a signal with positive and negative edges, separately controlled by strobes spaced apart in time. A JK flip-flop works the same way as an RS flip-flop, with one exception: when a logical one is applied to both inputs J and K, the state of the flip-flop output changes to the opposite. The J input (from the English Jump - jump) is similar to the S input of the RS flip-flop. Input K (from the English Kill - kill) is similar to the R input of an RS flip-flop. When a one is supplied to the input J and a zero to the input K, the output state of the flip-flop becomes equal to a logical one. And when one is supplied to input K and zero to input J, the output state of the trigger becomes equal to logical zero. The JK flip-flop, unlike the RS flip-flop, does not have prohibited states at the main inputs, but this does not help in any way when the rules for developing logic circuits are violated. In practice, only synchronous JK flip-flops are used, that is, the states of the main inputs J and K are taken into account only at the moment of clocking, for example, at the positive edge of the pulse at the synchronization input. JKQ(t) Q(t+1) 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 0 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 0 Based on the JK flip-flop it is possible to construct D -trigger or T-trigger. As you can see in the truth table of the JK flip-flop, it goes into an inverse state every time a logical 1 is simultaneously applied to inputs J and K. This property allows you to create a T flip-flop based on the JK flip-flop by combining inputs J and K [4]. D-trigger (D from English delay - delay) - remembers the input state and outputs it to the output. D-triggers have at least two inputs: informational D and synchronization C. Information is stored in D-triggers when the active edge arrives at input C. Since the information at the output remains unchanged until the arrival of the next synchronization pulse, a D-trigger is called also a trigger with information storage or a latch trigger. Speaking purely theoretically, a D-flip-flop can be formed from any RS or JK flip-flops if mutually inverse signals are simultaneously applied to their inputs.

DQ(t) Q(t+1) 0 0 0 0 1 0 1 0 1 1 1 1 D flip-flop is mainly used to implement latch. So, for example, to remove 32 bits of information from a parallel bus, they take 32 D flip-flops and combine their synchronization inputs to control the writing of information to the latch, and 32 D inputs are connected to the bus. The T-flip-flop changes its logical state at each cycle to the opposite one when the T input is one, and does not change the output state when the T input is zero. The T-flip-flop is often called a counting flip-flop. The T-trigger can be built on both JK and D-triggers. As can be seen in the truth table of the JK flip-flop, it goes into an inverse state each time a logical 1 is simultaneously applied to inputs J and K. This property allows you to create a T flip-flop based on the JK flip-flop, combining inputs J and K. Presence in D - the trigger of the dynamic C input allows you to obtain a T-flip-flop based on it. In this case, input D is connected to the inverse output, and counting pulses are supplied to input C. As a result, the trigger remembers the value with each counting pulse, that is, it will switch to the opposite state.

TQ(t) Q(t+1) 0 0 0 0 1 1 1 0 1 1 1 0 A T-trigger is often used to reduce the frequency by 2 times, while a unit is supplied to the T input, and a signal with a frequency is supplied to the C input. which will be divided.

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D-trigger

Let's consider a D-flip-flop (from the English delay), which repeats the input state at its output. Speaking purely theoretically, a D-flip-flop can be formed from any RS or JK flip-flops if mutually inverse signals are simultaneously applied to their inputs (Fig. 3.64).

Abrahamyan Evgeniy Pavlovich

Associate Professor, Department of Electrical Engineering, St. Petersburg State Polytechnic University

Information storage in D-flip-flops is ensured by synchronization, therefore all real D-flip-flops have two inputs: information D and synchronization C. In this flip-flop, the input signal is recorded by the synchronization signal and transmitted to the output. Since the output information remains unchanged until the next synchronization pulse arrives, the D flip-flop is also called a flip-flop with information storage or a latch flip-flop.

The graphical symbol for a D-flip-flop is shown in Fig. 3.65.

Logic gates (logical elements).

The processes necessary for the functioning of any technological devices (including PCs) can be implemented using a limited set of logical elements.

Buffer.

A buffer is a current amplifier that serves to match various logic gates, especially those based on different element bases (TL or CMOS).

Inverter.

An element used to invert incoming signals - a logical one turns into zero, and vice versa.

Logic diagram I.

And is an element of logical multiplication. A one (high voltage level) at the output appears only if there are ones present at both inputs at the same time.

An example of using the AND element in a real technical device: According to technical. According to the task, the mechanical press should operate only when two buttons separated by a certain distance are pressed simultaneously. The meaning of those The task is to ensure that both hands of the operator are occupied while the press is moving, which would eliminate the possibility of accidental injury to a limb. This can be implemented just using the AND gate.

Logic circuit AND - NOT.

NAND is the most commonly used element. It consists of AND and NOT logic gates connected in series.

OR logic circuit.

OR is a logical addition circuit. A logical one at the output appears if a high level (one) is present at any of the inputs.

Logic circuit OR - NOT.

OR - NOT consists of logical elements OR and NOT connected in series. Accordingly, it does NOT invert the values ​​at the OR output.

Exclusive OR logic circuit.

This gate produces a logical one at the output if one of the inputs is one and the other is zero. If the inputs have the same values, the output is zero.

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